Campus HagenbergInformatik, Kommunikation, Medien


Near Field Communication – NFC

Bei Near Field Communication – kurz NFC, handelt es sich um eine spezielle Funktechnologie, welche eine drahtlose Kommunikation über kurze Distanzen bis rund 10 cm erlaubt. Die kontaktlose Datenübertragung arbeitet dabei gleichzeitig hochsicher und ist in einem Kommunikationsstandard definiert.

Vielfältige Einsatzgebiete in Smartphones

NFC wird vorrangig in neuen Smartphones eingesetzt. Hier wird NFC zum persönlichen Zugriffsschlüssel bei Bedienterminals, wo spezielle Dienste oder Informationen abgerufen werden können.

Beispiele hierfür sind

  • digitale Eintrittskarten für Konzert, Kino, oder Fussballspiel,
  • elektronische Parktickets,
  • Zugangskontrollen für sensible Bereiche,
  • bargeldloses Bezahlen, oder die
  • Nutzung spezieller Internetdienste.

Mit Google Wallet setzt der bekannte US-Konzern die NFC-Technik ein, um die Kreditkarten künftig abzulösen. Dabei handelt es sich um ein mobiles Bezahlsystem für Android-Smartphones.

NFC Research Lab in Hagenberg

In Hagenberg wurde im Jahr 2005 das NFC Research Lab gegründet. Unter der Leitung von Prof(FH) Dr. Josef Langer werden hier Forschungs- und Studienprojekte zum Thema NFC durchgeführt. Mehr als 50 Studierende der Studiengänge Hardware-Software-Design, Embedded Systems Design, Sichere Informationssysteme und Mobile Computing haben Anwendungen und NFC Systeme entwickelt. Zahlreiche nationale und internationale Preise und Auszeichnungen hat das Research Lab inzwischen von vielen renommierten Stellen erhalten. Seit 2007 organisiert das Research Lab den NFC Kongress, seit 2010 auch einen internationalen wissenschaftlichen Workshop zum Thema NFC. Die zahlreichen Forschungsergebnisse sind in IEEE-Publikationen und Tagungsbänden (IEEE Computer Society) veröffentlicht.

Mobile Robotics

The main research topics in the field of mobile robotics at the departments of Hardware-Software-Design and Embedded Systems Design are software and hardware development for walking machines, especially six legged robots.

Mechanical Platform

A mechanical hexapod platform with 18 degrees of freedom of our own development is available in its third generation, and the next generation is coming up. The usage of modified model aircraft servo motors as actors in combination with light plywood parts manufactured with a laser cutter provides for an affordable, yet efficient, mobile robot. A worldwide leading manufacturer of such servos and mobile robots is among the industrial partners of the departments.

Embedded Control System

Our research's main focus lies on the hardware/software co-design of the embedded control system for such mobile robots in combination with the development of a user friendly specification method for actions a user might want the robot to perform.

Hardware and Software

Different hardware/software co-design platforms are used as embedded control systems. They provide combinations of a microcontroller with an FPGA, thereby opening up a wide space of possibilities in the area of hardware/software co-design. Another hardware platform developed at the department enables the completely integrated design in a system-on-chip manner. This invites the use of advanced techniques such as system-level designs of digital signal processing modules as dedicated hardware units, as for example to compute the inverse kinematics for the hexapod's legs.

Towards Insect Locomotion

The embedded software may make use of different operating systems depending on the selected platform, while dedicated hardware will engage in the duties demanding hard real-time or even deterministic behaviour. In addition to further research on walking patterns and the modeling of insect locomotion, additional sensors make the robot not only mobile but also autonomous. 

Integrated Circuit/EM Simulation – ICESTARS

With today's frequency bands of approximately 1 to 3 GHz it is impossible to realize extremely high data transfer rates for future communication devices like smart phones. Design and simulation of new and highly-complex Radio Frequency front ends operating beyond 10 and up to 100 GHz show critical issues and 'bottlenecks', which demand a completely new infrastructure.

The so-called ICESTARS project – Integrated Circuit/EM Simulation and Design Technologies for Advanced Radio Systems-on-chip– addresses a series of these issues.

The Objective

The objective of the ICESTARS project is to enable the realization of single-chip integration of high-GHz wireless modules for the next generation of smart phones by developing integrated simulation algorithms and prototype tools that overcome the barriers in existing design flows.

The aim of the project is to speed up the simulation time of electronic circuits in the high-GHz range. Analogue or Radio Frequency (RF) circuits are described by a system of nonlinear ordinary differential equations (DAEs) arising from Kirchhoff's laws and the device constitutive equations. Modern wireless transceivers (TRX) modulate the information source (the signal envelope or baseband signal) by a center frequency in the GHz range for an efficient use of the radio frequency spectrum. However, the higher the center frequency the larger the run time employing traditional Electronic Design Automation (EDA) tools.

Therefore, ICESTARS will introduce novel CAD tools for Electronic Design Automation. 

Research at Hagenberg, Upper Austria

Within the ICESTARS project, the University of Applied Sciences of Upper Austria takes the leadership of the workpackage "time domain simulation engines". The project has received research funding of the European Commission under the 7th Frame Program of the Information and Communication Technologies Programme (ICT). The ICESTARS consortium comprises two industrial partners (NXP Semiconductor and Infineon Technologies), two small and medium-sized enterprises (SMEs) and five universities.

Advanced Wireless Radio Communication – ARTEMOS

Telecommunications are evolving towards personal communication networks, whose objective can be stated as the ubiquitous availability of communication services to transfer anything, at anytime, anywhere, to anyone, via any-path available, by means of a pocketable communication terminal.

Consequently,  there is a huge market of an increasingly connected world population asking for mobile access to the vast information resources through of the internet and/or mobile phones.

The european project "Agile RF Transceivers and Front-Ends for Future SmartMulti-Standard Communication Applications" (ARTEMOS) aims at developing architecture and technologies for implementing agile radio frequency (RF) transceiver capacities in future radio communication products.

The Objective

The increasing demand of mobile communication at high bandwidth calls for frequency-agile, multi-standard and multi-band terminals integrating the cellular standards GSM/EDGE, UMTS, LTE and additional wireless communication standards for connectivity and positioning (Wi-Fi, GPS, Bluetooth, WirelessHD, WirelessUSB, NFC, Broadband PMR, all digital TV standards, etc.) into more efficient radio architectures.

The new architectures and technologies will be able to manage multi-standard (multi-band, multi-data-rate, and multi-waveform) operation with high modularity, low-power consumption, high reliability, high integration, low costs, low PCB area, and low bill of material.

It comprises different workpackages:

  • System Architecture and Control (WP1),
  • Enabling Active Bulding Blocks for Agile RF solutions (WP2),
  • Tunable Passive Frontend Solutions (WP3),
  • Modem Functions (WP4),
  • Methodologies & Simulation Tools (WP5),
  • Full Application Demonstrator (WP6), and
  • Project Management & Dissemination (WP7).

ARTEMOS Research Activities at Hagenberg

The Unversity of Applied Sciences of Upper Austria is responsible for the coordination of one workpackage jointly with NXP Semiconductors.

The ARTEMOS project is funded by the European Nanoelectronics Initiative Advisory Council (ENIAC). It has a large consortium of 38 partners, including all major European players in wireless communication hardware and an excellent mix of large companies, small and medium-sized enterprises (SMEs) and universities.

Wavelet based simulation of electronic circuits

"Wavelet based simulation of electronic circuits" is a basic research project funded by the FWF Austrian Science Fund. It comprises problems in applied engineering, specifically electronic design automation and in Applied Harmonic Analysis.

The Objective

The next generation of radio devices like smart phones need higher transmission rates which demand radio frequencies in the higher GHz range. The simulation of such electronic circuits is very time consuming. Therefore, its essential to speed up the simulation time which comprises the aim of the project.Modern wireless transceivers modulate the information source by a center frequency in the GHz range for an efficient use of the radio frequency spectrum. However, the higher the center frequency the larger the run time employing traditional Electronic Design Automation (EDA) tools. The reason lies in Shannon's sampling theorem which states that a digital representation of a signal requires a sampling (digitalization) rate at least twice as high as the highest frequency of the modulated signal. Novel simulation engines therefore split the signal envelope from the signal carrier which circumvents Shannon's theorem.

Alternative approach: wavelets

Modern digital like transceiver designs exhibit sharp transients of the signal waveforms which are hardly represented by sinusoidal waveforms which makes it difficult to represent the signals efficiently in a circuit simulator. In this project an alternative approach is chosen by representing the signal waveforms in an adaptive spline wavelet bases. Due to their adaptivity wavelet bases are able to represent sharp transients, i.e. devices with a low slew rate, compactly. Moreover the approximation of the waveforms is not conducted in standard spaces such as the Hilbert spaces but instead in Besov and Triebel-Lizorkin spaces.

Cooperation of JKU Linz and FH Hagenberg

This research project is a joint undertaken of the department of functional analysis (Prof. P. Müller) of the Johannes Kepler University, Linz, and the Embedded Systems Research Group (Prof. H.~G. Brachtendorf) at the University of Applied Sciences of Upper Austria.